A. Sergiyenko, O. Molchanov, P. Serhienko. Reconfigurable Manycore System // 5-th International Conference “High Performance Computing” HPC-UA 2018 (Ukraine, Kyiv, October 22-23, 2018). P. 127-130.
Abstract. An approach for designing the reconfigurable computing systems in FPGA is proposed, which is based on mapping synchronous data flow graphs to a manycore system. The reconfiguration is performed by switching data flows and exchanging the instruction sets of the processor cores. To implement the processor elements of such a system, a 16-bit RISC-processor core is developed, which has small hardware costs and a configurable instruction set.
Keywords: VHDL, FPGA, RISC, configurable computer.