Sergiyenko А.М., Lesyk T.M. Dynamically Tunable Digital Filters Configured in FPGA// Electron Modeling.- 2010. –V.32. -№6. –p.47-56. (In Russian)
Features of the dynamically tuned IIR filters, which are configured in FPGA, are considered. The filters utilize the frequency masking properties of the all-pass digital filters, which have the delay factors z-k. The mapping of the filter algorithm is implemented using pipelining and C-slow retiming techniques, which provide the minimized hardware volume and high clock frequency of the resulting filters.
The file for this article is provided in the language of the print edition (russian)
You can PREVIEW the materials online (POPUP) by clicking on the image of the file icon, or download to your computer by clicking the link below the icon.