Dynamically Tunable Digital Filters Configured in FPGA

Sergiyenko А.М., Lesyk T.M. Dynamically Tunable Digital Filters Configured in FPGA// Electron Modeling.- 2010. –V.32. -№6. –p.47-56. (In Russian)

Features of the dynamically tuned IIR filters, which are configured in FPGA, are considered. The filters utilize the frequency masking properties of the all-pass digital filters, which have the delay factors z-k. The mapping of the filter algorithm is implemented using pipelining and C-slow retiming techniques, which provide the minimized hardware volume and high clock frequency of the resulting filters.

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Dynamically Tunable Digital Filters Configured in FPGA.(russian)

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