A Method for Synchronous Dataflow Retiming.

A. Sergiyenko, A. Serhienko, A. Simonenko. A Method for Synchronous Dataflow Retiming. //IEEE First Ukraine Conference on Electrical and Computer Engineering (UKRCON). – 2017. – P. 1015-1018.

Abstract. A method of retiming the spatial synchronous dataflow graph (SDF) is proposed, which is based on the SDF representation in the multidimensional space. The dimensions of this space are spatial coordinate of the processing unit, coordinate of the operator firing and operator type. At the first stage of the datapath synthesis, the operator nodes are placed in the space according to a set of rules providing the minimum hardware volume and minimum clock period. At the second stage of the synthesis this spatial SDF is balanced and optimized providing the minimum register and multiplexor number in the resulting datapath. The resulting spatial SDF is described by VHDL language and is modeled and compiled using CAD tools.
Keywords—retiming, SDF, scheduling, pipelining, folding, datapath, FPGA, DSP

Leave a Reply

Your email address will not be published. Required fields are marked *